Root cause (verified against our exact IDF tree, not the community guess): the "258" in "sdio_write_task: Failed to send data: 258" is NOT a timeout (that is 263). 258 = 0x102 = ESP_ERR_INVALID_ARG. On the ESP32-P4, block- mode CMD53 writes require the SOURCE buffer to be 64-byte (cache-line) aligned; the IDF sdmmc driver rejects a misaligned source with INVALID_ARG BEFORE any bus activity. esp_hosts write loop then declares "Unrecoverable host sdio state" and reboots the whole P4. The audio TX payload is not 64-aligned, so streaming mic audio wedged on the very FIRST frame (which is exactly what we saw: listening -> instant Failed to send -> reboot). This also explains why buffer/queue/clock/retry tuning all did nothing: the write never reached the bus. And why our symptom was instant, not after ~100 writes (the community block-mode-desync theory) — it is the first misaligned buffer, every time. Fix: vendored esp_hosted 2.12.11 as an editable local component (overrides the registry copy) and bounce a misaligned TX payload through one aligned DMA scratch buffer in hosted_sdio_write_block (port_esp_hosted_host_sdio.c). TX is serialized by the bus lock so a single static bounce buffer is safe; freed in hosted_sdio_deinit. Host-only change — no C6 reflash. VERIFIED ON HARDWARE (autonomous self-test): 40s of continuous mic-audio upstream streaming — the traffic that previously wedged on the first frame — ran clean, zero timeouts, zero reboots. A guarded SDIO_TX_SELFTEST harness is kept (compiled out) for future SDIO stress testing. Credit: root cause + patch designed via multi-agent investigation; the precise 258=INVALID_ARG decode (correcting the upstream community timeout assumption) came from checking our actual esp_err.h. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
168 lines
4.9 KiB
C
168 lines
4.9 KiB
C
/*
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* SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef __SLAVE_BT_H__
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#define __SLAVE_BT_H__
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#include "esp_err.h"
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#include "esp_idf_version.h"
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#include <stdbool.h>
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#if defined(CONFIG_ESP_HOSTED_CP_BT) && (!defined(CONFIG_BT_ENABLED) || !defined(CONFIG_SOC_BT_SUPPORTED))
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#error "CONFIG_ESP_HOSTED_CP_BT is enabled but CONFIG_BT_ENABLED or CONFIG_SOC_BT_SUPPORTED is not enabled. Please enable BT support in menuconfig."
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#endif
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#ifdef CONFIG_ESP_HOSTED_CP_BT
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#if ESP_IDF_VERSION < ESP_IDF_VERSION_VAL(5, 0, 0)
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#include "driver/periph_ctrl.h"
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#define DISABLE_INTR_ON_GPIO GPIO_PIN_INTR_DISABLE
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#else
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#include "esp_private/periph_ctrl.h"
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#define DISABLE_INTR_ON_GPIO GPIO_INTR_DISABLE
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#endif
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#if (defined(CONFIG_IDF_TARGET_ESP32C3) || \
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defined(CONFIG_IDF_TARGET_ESP32S3))
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#define BT_OVER_C3_S3 1
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#endif
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#if CONFIG_IDF_TARGET_ESP32
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#if defined(CONFIG_BTDM_CONTROLLER_MODE_BLE_ONLY)
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#define BLUETOOTH_BLE 1
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#elif defined(CONFIG_BTDM_CONTROLLER_MODE_BR_EDR_ONLY)
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#define BLUETOOTH_BT 2
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#elif defined(CONFIG_BTDM_CONTROLLER_MODE_BTDM)
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#define BLUETOOTH_BT_BLE 3
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#endif
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#if defined(CONFIG_BTDM_CONTROLLER_HCI_MODE_VHCI)
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#define BLUETOOTH_HCI 4
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#elif CONFIG_BT_HCI_UART_NO
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#define BLUETOOTH_UART CONFIG_BT_HCI_UART_NO
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#elif CONFIG_BTDM_CTRL_HCI_UART_NO
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#define BLUETOOTH_UART CONFIG_BTDM_CTRL_HCI_UART_NO
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#endif
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#elif BT_OVER_C3_S3
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#define BLUETOOTH_BLE 1
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#if defined(CONFIG_BT_CTRL_HCI_MODE_VHCI)
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#define BLUETOOTH_HCI 4
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#elif CONFIG_BT_CTRL_HCI_MODE_UART_H4
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#define BLUETOOTH_UART CONFIG_ESP_HOSTED_BT_UART_PORT_ESP32_C3_S3
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#endif
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#else
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/* only BLE for chipsets other than ESP32 */
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#define BLUETOOTH_BLE 1
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#if defined(CONFIG_BT_LE_HCI_INTERFACE_USE_RAM)
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#define BLUETOOTH_HCI 4
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#elif defined(CONFIG_BT_LE_HCI_INTERFACE_USE_UART)
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#define BLUETOOTH_UART CONFIG_BT_LE_HCI_UART_PORT
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#endif
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#endif
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#ifdef BLUETOOTH_UART
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#include "driver/uart.h"
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#if defined(CONFIG_IDF_TARGET_ESP32)
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// GPIO pins are fixed
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#define BT_TX_PIN CONFIG_ESP_HOSTED_BT_UART_TX_PIN_ESP32
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#define BT_RX_PIN CONFIG_ESP_HOSTED_BT_UART_RX_PIN_ESP32
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#if defined(CONFIG_BTDM_CTRL_HCI_UART_FLOW_CTRL_EN)
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#define BT_RTS_PIN CONFIG_ESP_HOSTED_BT_UART_RTS_PIN_ESP32
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#define BT_CTS_PIN CONFIG_ESP_HOSTED_BT_UART_CTS_PIN_ESP32
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#else
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#define BT_RTS_PIN -1
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#define BT_CTS_PIN -1
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#endif
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#elif BT_OVER_C3_S3
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#define BT_BAUDRATE CONFIG_ESP_HOSTED_BT_UART_BAUDRATE_ESP32_C3_S3
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#if defined(CONFIG_IDF_TARGET_ESP32C3)
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#define BT_TX_PIN CONFIG_ESP_HOSTED_BT_UART_TX_PIN_ESP32_C3_S3
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#define BT_RX_PIN CONFIG_ESP_HOSTED_BT_UART_RX_PIN_ESP32_C3_S3
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#define BT_FLOWCTRL CONFIG_ESP_HOSTED_BT_UART_FLOWCONTROL_ESP32_C3_S3
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#if CONFIG_ESP_HOSTED_BT_UART_FLOWCONTROL_ESP32_C3_S3
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#define BT_RTS_PIN CONFIG_ESP_HOSTED_BT_UART_RTS_PIN_ESP32_C3_S3
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#define BT_CTS_PIN CONFIG_ESP_HOSTED_BT_UART_CTS_PIN_ESP32_C3_S3
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#else
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#define BT_RTS_PIN -1
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#define BT_CTS_PIN -1
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#endif
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#elif defined(CONFIG_IDF_TARGET_ESP32S3)
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#define BT_TX_PIN CONFIG_ESP_HOSTED_BT_UART_TX_PIN_ESP32_C3_S3
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#define BT_RX_PIN CONFIG_ESP_HOSTED_BT_UART_RX_PIN_ESP32_C3_S3
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#define BT_FLOWCTRL CONFIG_ESP_HOSTED_BT_UART_FLOWCONTROL_ESP32_C3_S3
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#if CONFIG_ESP_HOSTED_BT_UART_FLOWCONTROL_ESP32_C3_S3
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#define BT_RTS_PIN CONFIG_ESP_HOSTED_BT_UART_RTS_PIN_ESP32_C3_S3
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#define BT_CTS_PIN CONFIG_ESP_HOSTED_BT_UART_CTS_PIN_ESP32_C3_S3
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#else
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#define BT_RTS_PIN -1
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#define BT_CTS_PIN -1
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#endif
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#endif
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#define UART_RX_THRS (120)
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#if defined(CONFIG_ESP_HOSTED_BT_UART_FLOWCONTROL_ENABLED)
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#define GPIO_OUTPUT_PIN_SEL ((1ULL<<BT_TX_PIN) | (1ULL<<BT_RTS_PIN))
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#define GPIO_INPUT_PIN_SEL ((1ULL<<BT_RX_PIN) | (1ULL<<BT_CTS_PIN))
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#else
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#define GPIO_OUTPUT_PIN_SEL (1ULL<<BT_TX_PIN)
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#define GPIO_INPUT_PIN_SEL (1ULL<<BT_RX_PIN)
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#endif
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#else
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#define BT_TX_PIN CONFIG_BT_LE_HCI_UART_TX_PIN
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#define BT_RX_PIN CONFIG_BT_LE_HCI_UART_RX_PIN
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#if defined(CONFIG_BT_LE_HCI_UART_FLOWCTRL)
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#define BT_RTS_PIN CONFIG_BT_LE_HCI_UART_RTS_PIN
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#define BT_CTS_PIN CONFIG_BT_LE_HCI_UART_CTS_PIN
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#else
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#define BT_RTS_PIN -1
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#define BT_CTS_PIN -1
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#endif
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#endif
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#elif BLUETOOTH_HCI
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void process_hci_rx_pkt(uint8_t *payload, uint16_t payload_len);
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#endif
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esp_err_t init_bluetooth(void);
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esp_err_t enable_bluetooth(void);
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esp_err_t disable_bluetooth(void);
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esp_err_t deinit_bluetooth(bool mem_release);
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uint8_t get_bluetooth_capabilities(void);
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uint32_t get_bluetooth_ext_capabilities(void);
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#endif /* CONFIG_ESP_HOSTED_CP_BT */
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#endif /* __SLAVE_BT_H__ */
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