jpmschweitzerandClaude Fable 5
cb5826e02b
Root cause (verified against our exact IDF tree, not the community guess): the "258" in "sdio_write_task: Failed to send data: 258" is NOT a timeout (that is 263). 258 = 0x102 = ESP_ERR_INVALID_ARG. On the ESP32-P4, block- mode CMD53 writes require the SOURCE buffer to be 64-byte (cache-line) aligned; the IDF sdmmc driver rejects a misaligned source with INVALID_ARG BEFORE any bus activity. esp_hosts write loop then declares "Unrecoverable host sdio state" and reboots the whole P4. The audio TX payload is not 64-aligned, so streaming mic audio wedged on the very FIRST frame (which is exactly what we saw: listening -> instant Failed to send -> reboot). This also explains why buffer/queue/clock/retry tuning all did nothing: the write never reached the bus. And why our symptom was instant, not after ~100 writes (the community block-mode-desync theory) — it is the first misaligned buffer, every time. Fix: vendored esp_hosted 2.12.11 as an editable local component (overrides the registry copy) and bounce a misaligned TX payload through one aligned DMA scratch buffer in hosted_sdio_write_block (port_esp_hosted_host_sdio.c). TX is serialized by the bus lock so a single static bounce buffer is safe; freed in hosted_sdio_deinit. Host-only change — no C6 reflash. VERIFIED ON HARDWARE (autonomous self-test): 40s of continuous mic-audio upstream streaming — the traffic that previously wedged on the first frame — ran clean, zero timeouts, zero reboots. A guarded SDIO_TX_SELFTEST harness is kept (compiled out) for future SDIO stress testing. Credit: root cause + patch designed via multi-agent investigation; the precise 258=INVALID_ARG decode (correcting the upstream community timeout assumption) came from checking our actual esp_err.h. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
145 lines
5.3 KiB
C
145 lines
5.3 KiB
C
/*
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* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* Bitmask definitions used in RPC data */
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#ifndef __ESP_HOSTED_BITMASKS__H
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#define __ESP_HOSTED_BITMASKS__H
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#include "esp_idf_version.h"
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#define H_SET_BIT(pos, val) (val|=(1<<pos))
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#define H_GET_BIT(pos, val) (val&(1<<pos)? 1: 0)
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enum {
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WIFI_SCAN_AP_REC_phy_11b_BIT = 0,
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WIFI_SCAN_AP_REC_phy_11g_BIT = 1,
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WIFI_SCAN_AP_REC_phy_11n_BIT = 2,
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WIFI_SCAN_AP_REC_phy_lr_BIT = 3,
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WIFI_SCAN_AP_REC_phy_11ax_BIT = 4,
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WIFI_SCAN_AP_REC_wps_BIT = 5,
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WIFI_SCAN_AP_REC_ftm_responder_BIT = 6,
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WIFI_SCAN_AP_REC_ftm_initiator_BIT = 7,
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WIFI_SCAN_AP_REC_phy_11a_BIT = 8,
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WIFI_SCAN_AP_REC_phy_11ac_BIT = 9,
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WIFI_SCAN_AP_REC_MAX_USED_BIT = 10,
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};
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#define WIFI_SCAN_AP_RESERVED_BITMASK 0xFC00
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#define WIFI_SCAN_AP_GET_RESERVED_VAL(num) \
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((num & WIFI_SCAN_AP_RESERVED_BITMASK) >> WIFI_SCAN_AP_REC_MAX_USED_BIT)
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#define WIFI_SCAN_AP_SET_RESERVED_VAL(reserved_in,num_out) \
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(num_out |= (reserved_in << WIFI_SCAN_AP_REC_MAX_USED_BIT));
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enum {
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WIFI_STA_INFO_phy_11b_BIT = 0,
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WIFI_STA_INFO_phy_11g_BIT = 1,
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WIFI_STA_INFO_phy_11n_BIT = 2,
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WIFI_STA_INFO_phy_lr_BIT = 3,
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WIFI_STA_INFO_phy_11ax_BIT = 4,
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WIFI_STA_INFO_is_mesh_child_BIT = 5,
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WIFI_STA_INFO_MAX_USED_BIT = 6,
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};
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#define WIFI_STA_INFO_RESERVED_BITMASK 0xFFC0
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#define WIFI_STA_INFO_GET_RESERVED_VAL(num) \
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((num & WIFI_STA_INFO_RESERVED_BITMASK) >> WIFI_STA_INFO_MAX_USED_BIT)
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#define WIFI_STA_INFO_SET_RESERVED_VAL(reserved_in,num_out) \
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(num_out |= (reserved_in << WIFI_STA_INFO_MAX_USED_BIT));
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/* WIFI HE AP Info bitmasks */
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enum {
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// WIFI_HE_AP_INFO_BSS_COLOR is six bits wide
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WIFI_HE_AP_INFO_partial_bss_color_BIT = 6,
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WIFI_HE_AP_INFO_bss_color_disabled_BIT = 7,
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WIFI_HE_AP_INFO_MAX_USED_BIT = 8,
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};
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#define WIFI_HE_AP_INFO_BSS_COLOR_BITS 0x3F
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/*** There are currently two set of bitfields in wifi_sta_config_t */
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/* WIFI Station Config Bitfield 1 bitmasks */
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enum {
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WIFI_STA_CONFIG_1_rm_enabled = 0,
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WIFI_STA_CONFIG_1_btm_enabled = 1,
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WIFI_STA_CONFIG_1_mbo_enabled = 2,
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WIFI_STA_CONFIG_1_ft_enabled = 3,
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WIFI_STA_CONFIG_1_owe_enabled = 4,
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WIFI_STA_CONFIG_1_transition_disable = 5,
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WIFI_STA_CONFIG_1_MAX_USED_BIT = 6,
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};
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#define WIFI_STA_CONFIG_1_RESERVED_BITMASK 0xFFFFFFC0
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#define WIFI_STA_CONFIG_1_GET_RESERVED_VAL(num) \
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((num & WIFI_STA_CONFIG_1_RESERVED_BITMASK) >> WIFI_STA_CONFIG_1_MAX_USED_BIT)
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#define WIFI_STA_CONFIG_1_SET_RESERVED_VAL(reserved_in, num_out) \
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(num_out |= (reserved_in << WIFI_STA_CONFIG_1_MAX_USED_BIT));
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/* WIFI Station Config Bitfield 2 bitmasks */
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enum {
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WIFI_STA_CONFIG_2_he_dcm_set_BIT = 0,
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// WIFI_STA_CONFIG_he_dcm_max_constellation_tx is two bits wide
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WIFI_STA_CONFIG_2_he_dcm_max_constellation_tx_BITS = 1,
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// WIFI_STA_CONFIG_he_dcm_max_constellation_rx is two bits wide
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WIFI_STA_CONFIG_2_he_dcm_max_constellation_rx_BITS = 3,
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WIFI_STA_CONFIG_2_he_mcs9_enabled_BIT = 5,
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WIFI_STA_CONFIG_2_he_su_beamformee_disabled_BIT = 6,
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WIFI_STA_CONFIG_2_he_trig_su_bmforming_feedback_disabled_BIT = 7,
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WIFI_STA_CONFIG_2_he_trig_mu_bmforming_partial_feedback_disabled_BIT = 8,
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WIFI_STA_CONFIG_2_he_trig_cqi_feedback_disabled_BIT = 9,
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#if ESP_IDF_VERSION < ESP_IDF_VERSION_VAL(5, 5, 0)
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WIFI_STA_CONFIG_2_MAX_USED_BIT = 10,
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#else
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WIFI_STA_CONFIG_2_vht_su_beamformee_disabled = 10,
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WIFI_STA_CONFIG_2_vht_mu_beamformee_disabled = 11,
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WIFI_STA_CONFIG_2_vht_mcs8_enabled = 12,
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WIFI_STA_CONFIG_2_MAX_USED_BIT = 13,
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#endif
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};
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#if ESP_IDF_VERSION < ESP_IDF_VERSION_VAL(5, 5, 0)
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#define WIFI_STA_CONFIG_2_RESERVED_BITMASK 0xFFFFFC00
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#else
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#define WIFI_STA_CONFIG_2_RESERVED_BITMASK 0xFFFFE000
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#endif
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#define WIFI_STA_CONFIG_2_GET_RESERVED_VAL(num) \
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((num & WIFI_STA_CONFIG_2_RESERVED_BITMASK) >> WIFI_STA_CONFIG_2_MAX_USED_BIT)
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#define WIFI_STA_CONFIG_2_SET_RESERVED_VAL(reserved_in,num_out) \
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(num_out |= (reserved_in << WIFI_STA_CONFIG_2_MAX_USED_BIT));
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#endif
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/* WIFI ITWT Setup Config bitmasks */
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enum {
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WIFI_ITWT_CONFIG_1_trigger_BIT = 0,
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WIFI_ITWT_CONFIG_1_flow_type_BIT = 1,
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// WIFI_ITWT_CONFIG_1_flow_id_BIT is three bits wide
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WIFI_ITWT_CONFIG_1_flow_id_BIT = 2,
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// WIFI_ITWT_CONFIG_1_wake_invl_expn_BIT is five bits wide
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WIFI_ITWT_CONFIG_1_wake_invl_expn_BIT = 5,
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WIFI_ITWT_CONFIG_1_wake_duration_unit_BIT = 10,
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WIFI_ITWT_CONFIG_1_MAX_USED_BIT = 11,
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};
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#define WIFI_ITWT_CONFIG_1_RESERVED_BITMASK 0xFFFFF800
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#define WIFI_ITWT_CONFIG_1_GET_RESERVED_VAL(num) \
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((num & WIFI_ITWT_CONFIG_1_RESERVED_BITMASK) >> WIFI_ITWT_CONFIG_1_MAX_USED_BIT)
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#define WIFI_ITWT_CONFIG_1_SET_RESERVED_VAL(reserved_in,num_out) \
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(num_out |= (reserved_in << WIFI_ITWT_CONFIG_1_MAX_USED_BIT));
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