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jpmschweitzerandClaude Fable 5 cb5826e02b
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Fork fix: the SDIO wedge is FIXED (esp-hosted-mcu #167)
Root cause (verified against our exact IDF tree, not the community guess):
the "258" in "sdio_write_task: Failed to send data: 258" is NOT a timeout
(that is 263). 258 = 0x102 = ESP_ERR_INVALID_ARG. On the ESP32-P4, block-
mode CMD53 writes require the SOURCE buffer to be 64-byte (cache-line)
aligned; the IDF sdmmc driver rejects a misaligned source with INVALID_ARG
BEFORE any bus activity. esp_hosts write loop then declares "Unrecoverable
host sdio state" and reboots the whole P4. The audio TX payload is not
64-aligned, so streaming mic audio wedged on the very FIRST frame (which is
exactly what we saw: listening -> instant Failed to send -> reboot).

This also explains why buffer/queue/clock/retry tuning all did nothing: the
write never reached the bus. And why our symptom was instant, not after
~100 writes (the community block-mode-desync theory) — it is the first
misaligned buffer, every time.

Fix: vendored esp_hosted 2.12.11 as an editable local component (overrides
the registry copy) and bounce a misaligned TX payload through one aligned
DMA scratch buffer in hosted_sdio_write_block (port_esp_hosted_host_sdio.c).
TX is serialized by the bus lock so a single static bounce buffer is safe;
freed in hosted_sdio_deinit. Host-only change — no C6 reflash.

VERIFIED ON HARDWARE (autonomous self-test): 40s of continuous mic-audio
upstream streaming — the traffic that previously wedged on the first frame
— ran clean, zero timeouts, zero reboots. A guarded SDIO_TX_SELFTEST harness
is kept (compiled out) for future SDIO stress testing.

Credit: root cause + patch designed via multi-agent investigation; the
precise 258=INVALID_ARG decode (correcting the upstream community timeout
assumption) came from checking our actual esp_err.h.

Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
2026-07-15 09:50:27 +02:00
..

ESP-Hosted Transport Configuration Example

Demonstrates how to configure ESP-Hosted transport interfaces (SDIO, SPI, UART) before initialization.

Supported Transports

Transport Speed Pins Use Case
SDIO 1-bit High 5 pins Good performance, fewer pins
SDIO 4-bit Highest 7 pins Best performance
SPI Full-Duplex Medium 6 pins Standard interface
SPI HD Dual Medium 4 pins Fewer pins needed
SPI HD Quad Medium 6 pins Better throughput
UART Low 3 pins Simple connection

Pin Connections

SDIO 1-bit

Host <-> Slave (5 pins) CLK CMD DAT0 DAT1 (interrupt) RESET

SDIO 4-bit (Default)

Host <-> Slave (7 pins) CLK CMD DAT0 DAT1 DAT2 DAT3 RESET

SPI Full-Duplex

Host <-> Slave (6 pins) MOSI MISO SCLK CS HANDSHAKE DATA_READY

SPI Half-Duplex Dual

Host <-> Slave (4 pins) CLK CS D0 D1 (+ DATA_READY)

SPI Half-Duplex Quad

Host <-> Slave (6 pins) CLK CS D0 D1 D2 D3 (+ DATA_READY)

UART

Host <-> Slave (3 pins) TX RX RESET

What This Example Shows

  • Get default transport configuration
  • Customize parameters (clock, pins, buffers)
  • Apply configuration before esp_hosted_init()

Key Code Pattern

// 1. Get default config
struct esp_hosted_sdio_config config = INIT_DEFAULT_HOST_SDIO_CONFIG();

// 2. Customize settings
config.clock_freq_khz = 25000;
config.bus_width = 4;

// 3. Apply config
esp_hosted_sdio_set_config(&config);

// 4. Initialize ESP-Hosted
esp_hosted_init();

Customization

Tip

This example was added to showcase (Option 2: Programmatic Configuration) discussed below. (Option 1: Using menuconfig) is anyway available for any host example.

Pin Configuration Options

Option 1: Using menuconfig

First select your transport:

idf.py menuconfig
# (Top) → Component config → ESP-Hosted config → Transport layer

Then configure pins:

  • SDIO: (Top) → Component config → ESP-Hosted config → Hosted SDIO Configuration
  • SPI Full-Duplex: (Top) → Component config → ESP-Hosted config → SPI Configuration
  • SPI Half-Duplex: (Top) → Component config → ESP-Hosted config → SPI Half-duplex Configuration
  • UART: (Top) → Component config → ESP-Hosted config → UART Configuration

Option 2: Programmatic Configuration Edit the configuration functions in main.c for users who prefer code-based configuration or have limitations with menuconfig:

// Example: Custom SPI pin assignment
spi_config.pin_mosi.pin = YOUR_MOSI_PIN;
spi_config.pin_miso.pin = YOUR_MISO_PIN;
spi_config.pin_sclk.pin = YOUR_SCLK_PIN;
spi_config.pin_cs.pin = YOUR_CS_PIN;

Other Customizations

  • Clock speeds: Adjust for stability vs performance
  • Buffer sizes: Tune for your throughput needs
  • Data lines: Configure GPIOs to match your connections
  • Transport config: Any other transport specific config