Stability round 2: WIFI_PS_NONE + 10MHz SDIO
1-bit bus alone did not stop the sdio_write timeout wedge (recurred at ~5min uptime). Modem power save is the new prime suspect: the C6 napping mid-SDIO-transaction matches the minutes-scale periodicity. Always-powered appliance -> PS_NONE costs ~50mW and removes the entire failure class if correct. SDIO clock also halved to 10MHz. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
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@@ -51,7 +51,7 @@ CONFIG_ESP_HOSTED_DFLT_TASK_FROM_SPIRAM=n
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# hosted 2.x: keep internal RAM for task stacks; buffers go to PSRAM
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CONFIG_ESP_HOSTED_MEMPOOL_PREFER_SPIRAM=y
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# conservative SDIO clock for first data-path proof (raise after verification)
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CONFIG_ESP_HOSTED_SDIO_CLOCK_FREQ_KHZ=20000
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CONFIG_ESP_HOSTED_SDIO_CLOCK_FREQ_KHZ=10000
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# headroom for diag event handlers that touch LVGL
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CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE=4096
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