diff --git a/firmware/components/esp32_p4_wifi6_touch_lcd_xc/include/bsp/display.h b/firmware/components/esp32_p4_wifi6_touch_lcd_xc/include/bsp/display.h
index 8592672..881c483 100644
--- a/firmware/components/esp32_p4_wifi6_touch_lcd_xc/include/bsp/display.h
+++ b/firmware/components/esp32_p4_wifi6_touch_lcd_xc/include/bsp/display.h
@@ -23,7 +23,13 @@
 #if CONFIG_BSP_LCD_TYPE_800_800_3_4_INCH
 #define BSP_LCD_H_RES              (800)
 #define BSP_LCD_V_RES              (800)
-#define BSP_LCD_MIPI_DSI_LANE_BITRATE_MBPS (1500)
+/* 720 Mbps, not the stock 1500 (the P4 max): a high DSI lane rate makes the
+ * framebuffer read bursty (a whole line slammed out fast, then idle), and those
+ * bursty high-demand reads are what underrun when esp-hosted's Wi-Fi SDIO DMA
+ * contends for the PSRAM bus. Lowering the lane rate smooths the read so it
+ * tolerates the contention. Espressif's documented underrun fix. Floor at the
+ * 40 MHz pixel clock / 2 lanes is ~480 Mbps, so 720 keeps margin. */
+#define BSP_LCD_MIPI_DSI_LANE_BITRATE_MBPS (720)
 #elif CONFIG_BSP_LCD_TYPE_720_720_4_INCH
 #define BSP_LCD_H_RES              (720)
 #define BSP_LCD_V_RES              (720)